Abstract
Plenoptic cameras are receiving increased attention in scientific and commercial applications because they capture the entire structure of light in a scene, enabling optical transforms (such as focusing) to be applied computationally after the fact, rather than once and for all at the time a picture is taken. In many settings, real-time inter active performance is also desired, which in turn requires significant computational power due to the large amount of data required to represent a plenoptic image. Although GPUs have been shown to provide acceptable performance for real-time plenoptic rendering, their cost and power requirements make them prohibitive for embedded uses (such as in-camera). On the other hand, the computation to accomplish plenoptic rendering is well structured, suggesting the use of specialized hardware. Accordingly, this paper presents an array of switch-driven finite impulse response filters, implemented with FPGA to accomplish high-throughput spatial-domain rendering. The proposed architecture provides a power-efficient rendering hardware design suitable for full-video applications as required in broadcasting or cinematography. A benchmark assessment of the proposed hardware implementation shows that real-time performance can readily be achieved, with a one order of magnitude performance improvement over a GPU implementation and three orders ofmagnitude performance improvement over a general-purpose CPU implementation.
| Original language | English |
|---|---|
| Article number | 8322307 |
| Pages (from-to) | 9757-9766 |
| Number of pages | 10 |
| Journal | IEEE Transactions on Industrial Electronics |
| Volume | 65 |
| Issue number | 12 |
| DOIs | |
| Publication status | Published - 22 Mar 2018 |
Keywords
- Cinematography
- focusing
- imaging
- parallel processing
- photography
- programmable logic arrays
ASJC Scopus subject areas
- Control and Systems Engineering
- Electrical and Electronic Engineering
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